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H8SX/1663M 数据表(PDF) 953 Page - Renesas Technology Corp |
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H8SX/1663M 数据表(HTML) 953 Page - Renesas Technology Corp |
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953 / 1504 page ![]() Section 19 Serial Communication Interface (SCI, IrDA, CRC) Rev. 2.00 Sep. 24, 2008 Page 921 of 1468 REJ09B0412-0200 Yes <End> [1] No Initialization Start reception [2] No Yes Read RDRF flag in SSR [4] [5] Clear RE bit in SCR to 0 Read ORER, PER, and FER flags in SSR Error processing (Continued on next page) [3] Read receive data in RDR, and clear RDRF flag in SSR to 0 No Yes PER ∨ FER ∨ ORER = 1 RDRF = 1 All data received? [1] SCI initialization: The RxD pin is automatically designated as the receive data input pin. [2] [3] Receive error processing and break detection: If a receive error occurs, read the ORER, PER, and FER flags in SSR to identify the error. After performing the appropriate error processing, ensure that the ORER, PER, and FER flags are all cleared to 0. Reception cannot be resumed if any of these flags are set to 1. In the case of a framing error, a break can be detected by reading the value of the input port corresponding to the RxD pin. [4] SCI state check and receive data read: Read SSR and check that RDRF = 1, then read the receive data in RDR and clear the RDRF flag to 0. Transition of the RDRF flag from 0 to 1 can also be identified by an RXI interrupt. [5] Serial reception continuation procedure: To continue serial reception, before the stop bit for the current frame is received, read the RDRF flag and RDR, and clear the RDRF flag to 0. However, the RDRF flag is cleared automatically when the DMAC or DTC is initiated by an RXI interrupt and reads data from RDR. Figure 19.12 Sample Serial Reception Flowchart (1) |
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