H8SXSLASH1663M datasheet(307/1504 Pages) RENESAS

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H8SX/1663M 数据表(PDF) 307 Page - Renesas Technology Corp

部件名	H8SX/1663M

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1504 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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307 / 1504 page

Section 9 Bus Controller (BSC)

Rev. 2.00 Sep. 24, 2008 Page 275 of 1468

REJ09B0412-0200

9.9.7

Wait Control

In the data cycle of the address/data multiplexed I/O interface, program wait insertion and pin wait

insertion by the

WAIT pin are enabled in the same way as in the basic bus interface. For details,

refer to section 9.6.4, Wait Control.

Wait control settings do not affect the address cycles.

9.9.8

Read Strobe (

RD) Timing

In the address/data multiplexed I/O interface, the read strobe timing of data cycles can be modified

in the same way as in basic bus interface. For details, refer to section 9.6.5, Read Strobe (

RD)

Timing.

Figure 9.34 shows an example when the read strobe timing is modified.

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