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SH7065 数据表(PDF) 73 Page - Renesas Technology Corp |
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SH7065 数据表(HTML) 73 Page - Renesas Technology Corp |
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73 / 941 page ![]() Section 2 CPU Rev. 5.00 Sep 11, 2006 page 51 of 916 REJ09B0332-0500 MOV.L ModAddr,Rn; Rn=ModEnd, ModStart LDC Rn,MOD; ME=ModEnd, MS=ModStart ModAddr: .DATA.W mEnd; ModEnd .DATA.W mStart; ModStart ModStart: .DATA : ModEnd: .DATA The start and end addresses are specified in MS and ME, then the DMX or DMY bit is set to 1. The address register contents are compared with ME, and if they match, start address MS is stored in the address register. The lower 16 bits of the address register are compared with ME. The maximum modulo size is 64 kbytes. This is sufficient to access the X and Y memory. A block diagram of modulo addressing is shown in figure 2.11. Instruction (MOVX/MOVY) DMX CONT MS CMP ME ALU AU ABx ABy R4[Ax] R6[Ay] R5[Ax] R7[Ay] R8[Ix] R9[Iy] DMY 31 0 0 0 0 1 1 16 16 15 15 15 31 31 31 +2 +0 +2 +0 15 15 1 1 XAB YAB 15 Figure 2.11 Modulo Addressing |
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