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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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M16C/62 数据表(PDF) 95 Page - Renesas Technology Corp |
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M16C/62 数据表(HTML) 95 Page - Renesas Technology Corp |
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95 / 621 page  Mitsubishi microcomputers M16C / 62 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER DMAC 80 Single-chip mode Memory expansion mode Transfer unit Bus width Access address Microprocessor mode No. of read No. of write No. of read No. of write cycles cycles cycles cycles 16-bit Even 1 1 1 1 8-bit transfers (BYTE= “L”) Odd 1 1 1 1 (DMBIT= “1”) 8-bit Even — — 1 1 (BYTE = “H”) Odd — — 1 1 16-bit Even 1 1 1 1 16-bit transfers (BYTE = “L”) Odd 2 2 2 2 (DMBIT= “0”) 8-bit Even — — 2 2 (BYTE = “H”) Odd — — 2 2 Table 1.16.2. No. of DMAC transfer cycles Internal memory External memory Internal ROM/RAM Internal ROM/RAM SFR area Separate bus Separate bus Multiplex No wait With wait No wait With wait bus 12 2 1 2 3 Coefficient j, k (2) DMAC transfer cycles Any combination of even or odd transfer read and write addresses is possible. Table 1.16.2 shows the number of DMAC transfer cycles. The number of DMAC transfer cycles can be calculated as follows: No. of transfer cycles per transfer unit = No. of read cycles x j + No. of write cycles x k |
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