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4502 数据表(PDF) 21 Page - Renesas Technology Corp |
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4502 数据表(HTML) 21 Page - Renesas Technology Corp |
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21 / 214 page ![]() 1-9 4502 Group HARDWARE Rev.2.01 Feb 02, 2005 REJ09B0193-0201 Port block diagram (2) IAP0 instruction K0i OP0A instruction Register A Ai Ai D T Q (Note 1) PU0i (Note 2) (Note 2) (Note 4) “L” level detection circuit P02, P03 IAP0 instruction K0j OP0A instruction Register A Aj Aj D T Q (Note 1) PU0j Pull-up transistor (Note 3) (Note 3) (Note 4) Key-on wakeup “L” level detection circuit This symbol represents a parasitic diode on the port. 2: i represents 0 or 1. 3: j represents 2 or 3. 4: Applied potential to port P0 must be VDD or less. Notes 1: Key-on wakeup input Pull-up transistor P00, P01 PIN DESCRIPTION |
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