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TDA7340P 数据表(PDF) 9 Page - STMicroelectronics |
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TDA7340P 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 16 page ![]() NOTES TO THE CHARACTERISTICS (continued) 5. Control range typ 11% of VR (see figure 2) 6. Control range typ 30% of VR (see figure 1) Figure 1: High Cut Control -0.4 -0.3 -0.2 -0.1 VSB-VR(V) D94AU056 0 10 20 30 40 50 SEP (dB) VR=3.6V Figure 2: Stereo Blend I 2C BUS INTERFACE Interface Protocol The interface protocol comprises: A start condition (s) A chip address byte, (the LSB bit determines read/write transmission). A subaddress byte A sequence of data (N-bytes + acknowledge) A stop condition (P) ACK = Acknowledge S = Start P = Stop I = Autoincrement MAX CLOCK SPEED 500kbits/s Autoincrement If bit I in the subaddress byte is set to ”1”, the autoincrement of subaddress is enabled. VTH VMPX DC-LEVEL TR THIGH TF Time D94AU185 Figure 3 (*) All thresholds are measured by using a pulse with TR =2 µs, THIGH =2 µs and TF =10µs. The repetition rate must not increase the PEAK voltage. S 1000100 R/W ACK I ACK DATA ACK P MSB LSB MSB LSB MSB LSB CHIP ADDRESS D95AU216 XX T A3 A2 A1 A0 SUBADDRESS DATA 1 ... DATA n TDA7340 9/16 |
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