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TDA7360 数据表(PDF) 13 Page - STMicroelectronics |
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TDA7360 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 22 page ![]() OUTPUT STAGE Poor current capability and low cutoff frequency are well known limits of the standard lateral PNP. Composite PNP-NPN power output stages have been widely used, regardless their high saturation drop. This drop can be overcome only at the ex- pense of external components, namely, the boot- strap capacitors. The availability of 4A isolated collector PNP (ICV PNP) adds versatility to the design. The performance of this component, in terms of gain, VCEsat and cut-off frequency, is shown in fig. 29, 30, 31 respectively. It is realized in a new bipolar technology, characterized by top- bottom isolation techniques, allowing the imple- mentation of low leakage diodes, too. It guaran- tees BVCEO > 20V and BVCBO > 50V both for NPN and PNP transistors. Basically, the connec- tion shown in fig. 32 has been chosen. First of all because its voltage swing is rail-to-rail, limited only by the VCEsat of the output transistors, which are in the range of 0.3 Ω each. Then, the gain VOUT/VIN is greater than unity, approxi- mately 1+R2/R1. (VCC/2 is fixed by an auxiliary amplifier common to both channel). It is possible, controlling the amount of this local feedback, to force the loop gain (A * β) to less than unity at fre- quencies for which the phase shift is 180 °. This means that the output buffer is intrinsically stable and not prone to oscillation. In contrast, with the circuit of fig. 33, the solution adopted to reduce the gain at high frequencies is the use of an external RC network. AMPLIFIER BLOCK DIAGRAM The block diagram of each voltage amplifier is shown in fig. 34. Regardless of production spread, the current in each final stage is kept low, with enough margin on the minimum, below which cross-over distortion would appear. Figure 29: ICV - PNP Gain vs. IC Figure 30: ICV - PNP VCE(sat) vs. IC Figure 31: ICV - PNP cut-off frequency vs. IC Figure 32: The New Output Stage TDA7360 13/22 |
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