TDA7522

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Table 2. Main DC Characteristics (I)

Table 3. Main DC Characteristics (II)

4.0 STANDARD VERSION MEMORY MAP

The memory spase, as seen by ST7 is defined in table 4; please take note that there are registers which

are used for less than 8 bit or, on the other side, when read only certan bit contain useful information. Re-

ferr to appendix a to have a complete list of register structure.

Table 4. TDA7522 Memory Map

Current input

Condition

Min

Typ

Max

Unit

A+C diode input

1

16

µA

B+D diode input

1

16

µA

E diode input

1

16

µA

F diode input

1

16

µA

Voltage input

Condition

Min

Typ

Max

Unit

A+C diode input

45

700

mVpp

B+D diode input

45

700

mVpp

E diode input

45

700

mVpp

F diode input

45

700

mVpp

Address

Block

Register name

Reset

Status

Remarks

0000h

0001h

0002h

0003h

Port A

Data Register

Data Direction Register

Option Register

Pull Up Register

00h

00h

00h

00h

R/W Register

R/W Register

R/W Register

R/W Register

0004h

0005h

0006h

0007h

Port B

Data Register

Data Direction Register

Option Register

Pull Up Register

00h

00h

00h

00h

R/W Register

R/W Register

R/W Register

R/W Register

0008h

........

000Bh

Reserved

000Ch

ST7 Miscellaneous Register

00h

See specifications

000Dh

Not Available

000Eh

000Fh

0010h

Reserved for ST7 TEST