M52347SP/FP

Rev.2.00 Sep 14, 2006 page 13 of 16

3. Sampling Pulse from VD Portion

V TIME GATE SW (Pin 10)

Whether to output the pulse of VD portion from pins 14 and 15 can be selected. When pin 10 is "H" or OPEN, pulse of

the VD portion is output. When pin 10 is "L", the pulse of the VD portion is not output.

VD portion

Output at pin 14 when pin 10 is "H" or OPEN

Output at pin 15 when pin 10 is "H" or OPEN

Output at pin 14 when pin 10 is "L"

Output at pin 15 when pin 10 is "L"

VD portion

4. Output Stage

1) Logic output (pins 1, 2, 18 and 19)

The output format is as shown in the diagram below.

When the internal load resistance of the IC is 20 k

Ω, a current of approx. 3 mA flows to the inside of the IC, no

problem will occur.

20 k

Ω

2) Pulse output (pins 12, 13, 14, 15 and 17)

The output format is as shown in the diagram below.

When the internal load resistance of the IC is 1 k

Ω, a current of approx. 6 mA flows to the inside of the IC, no

problem will occur.

To improve the rising speed, connect a resistance between power supplies. Note that the low level of the output

pulse goes up.

1 k

1 k

Ω