PIN ASSIGMENT

Pin No

Pin Name

Function

Pin No

Pin Name

Function

1

GND

Ground

22

CK728

728kHz Clock Intput

2

XC1

Optional Crystal

23

NDO

NICAM Data Output

3

XC2

Optional Crystal

24

TEST

To be connected to GND

4

DF2

Data Filter 2 (eye monitor)

25

MMO

Matrix Mute Out

5

DF1

Data Filter 1 (eye monitor)

26

GND

Ground

System B/G Input

27

AOL

Audio Output Left

System I Input

28

AOR

Audio Output Right

8

AGC

AGC Filter Capacitor

29

DC1

Decoupling 1

+12V Supply

30

DC2

Decoupling 2

10

+5V Supply

31

AMOL

Audio Mutable Output Left

11

LFIL1

Left Filter 1 (J-17 De-emphasis)

32

AMOR

Audio Mutable Output Right

12

RG

Gain Setting Resistor for DAC

33

CAP

Decoupling Capacitor

13

GND

Ground

34

MAI

Mono Audio Input

14

RFIL1

Right Filter 1 (J-17 De-emphasis)

35

SAIL

Stereo Audio Input Left

15

RESET

Reset Chip

36

SAIR

Stereo Audio Input Right

16

+5V Supply

37

EAIL

External Audio Input Left

17

SERI

Interchip Serial Bus Input

38

EAIR

External Audio Input Right

18

DACDL

DAC Data Left Input

39

+12V Supply

19

DACDR

DAC Data Right Input

40

XK1

11.648MHz Crystal

20

GND

Ground

41

LF2

Loop Filter 2

21

CK11648

11.648MHz Clock Output

42

LF1

Loop Filter 1

SERIAL

INTERFACE

LPF

MUTE

SWITCH

LPF

DUAL FREQ

SYNTHESISER

QSPSK

DEMOD

CLOCK

& DATA

RECOVERY

AGC

SWITCH

DAC

DAC

TDA8205

39

8

5

4

42

23

22211918

11

34 35 36

31

32

37

38

27

28

29

30

25

20

17

33

14

12

15

24

6

7

1

26

13

TEST

RESET

I

IN

BG

IN

GND

RG

RFIL1

CAP

SERI

MMO

DC1

DC2

AOL

AOR

41

9

16

10

MATRIX

SWITCH

XC1

2

340

XC2

XK1

GND

GND

GND

BLOCK DIAGRAM

BLOCK DIAGRAM DESCRIPTION

The QPSK signal enters the IC via two inputs after

passing through two external bandpass filters at

the relevant frequencies of 6.552MHz and

5.85MHz for system I and B/G respectively. The

two inputs enter a source selection switch and pass

immediately to an AGC block which has a total

range of 40dB. The resulting levelled signal passes

to the QPSK demodulator which recovers the NI-

CAM 728Kb/s data stream by means of carrier and

clock recovery circuits.

Carrier recovery is achieved with a baseband re-

modulator which consists of a phase locked loop

with a switchable phase detector. This allows it to

lock to one of four possible phases of the QPSK

TDA8205

2/8