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TDA8218 数据表(PDF) 7 Page - STMicroelectronics |
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TDA8218 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 9 page ![]() Vcc1 2 To frame amplifier Frame sync pulse INPUT CURRENT COMPENSATION Figure 6 : Frame Oscillator Vcc1 18 19 14 Line Flyback Input Vcc1 RC SSC Output RC Network Σ Line Flyback Detection Burst gate pulse generator 8 Frame Blanking Generator Vcc1 R C BurstKey Figure 7 : Super sandcastle generator Line output (Pin 17) It is an open-collector output. The output positive pulse time is 28 µs for a 64µs period. The oscillator thresholds are internally fixed by resistors. The oscillator is synchronized during the last half free run period. The input current during the charge of the capacitor is less than 100nA. Frame output amplifier This amplifier is able to drive directly the frame yoke. Its output is short circuit and overload pro- tected; it contains also a thermal protection. The line flyback detection is provided by a compa- rator which compares the input line flyback pulse to an internal reference. The burst gate pulse posi- tion is fixed by the external RC network (pin 14). It is referenced to the middle of the line flyback. The frame blanking generator is a monostable with external R.C. The start blanking pulse is triggered by the falling edge of the frame saw-tooth (Pin 2). The reset is provided by a comparator which com- pares the capacitor voltage during its charge to an internal threshold fixed by resistors. The frame blanking time is defined by : Tfb = 0.613 ⋅ R.C. This pulse is available on Super Sand Castle output (Pin 19). Remark : For compatability with TEA5640, frame blanking time must be larger than 1.15ms with centered value @ 1.35ms (R = 100k Ω ± 1%, C = 22nF ± 5%) TDA8218 7/9 |
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