TDA9102C

H/V PROCESSOR FOR TTL V.D.U

May 1996

POWERDIP20 (0.4)

(Plastic package)

ORDER CODES : TDA9102C

HORIZONTAL SECTION

.

SYNCHRONIZATION INPUT : TTL COMPAT-

IBLE, NEGATIVE EDGE TRIGGERED

.

SYNCHRONIZATION INDEPENDENT FROM

DUTY CYCLE TIME

.

OSCILLATOR : FREQUENCY RANGE FROM

15kHz to 100kHz

.

HORIZONTAL

OUTPUT

PULSE

SHAPER

AND SHIFTER

.

PHASE

COMPARATOR

BETWEEN

SYN-

CHRO AND OSCILLATOR (PLL1)

.

PHASE COMPARATOR BETWEEN FLYBACK

AND OSCILLATOR (PLL2)

.

INTERNAL VOLTAGE REGULATOR

.

DC COMPATIBLE CONTROLS FOR PHASE

AND FREQUENCY

.

HORIZONTAL OUTPUT DUTY CYCLE : 41%

VERTICAL SECTION

.

SYNCHRONIZATION INPUT : TTL COMPAT-

IBLE, NEGATIVE EDGE TRIGGERED

.

SYNCHRONIZATION INDEPENDENT FROM

DUTY CYCLE TIME

.

OSCILLATOR : FREQUENCY RANGE FROM

30Hz to 120Hz

.

RAMP GENERATOR WITH VARIABLE GAIN

STAGE

.

VERTICAL RAMP VOLTAGE REFERENCE

.

INTERNAL VOLTAGE REGULATOR

.

DC COMPATIBLE CONTROLS FOR FRE-

QUENCY, AMPLITUDE AND LINEARITY

DESCRIPTION

The TDA9102C is a monolithic integrated circuit for

horizontal and vertical sync processing in mono-

chrome and color video displays driven by input

TTL compatible signals.

The TDA9102C is supplied in a 20 pin dual in line

package with pin 11 connected to ground and used

for heatsinking.

10

9

8

7

6

5

4

3

2

1

11

12

13

14

15

16

17

18

19

20

Horizontal Phase Adjust

Phase Comparator 2 Output

Horizontal Flyback Input

Horizontal Output

Horizontal Power Ground

C5

Horizontal TTL Input

Phase Comparator 1 Output

C2

R1

Substrate Ground

Vertical Frequency Preset

C13

Vertical TTL Input

Vertical Ramp Output

Vertical Amplitude Adjust

Vertical Linearity Adjust

Linearity Output

Vertical Reference Voltage

V

S

PIN CONNECTIONS

1/7