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M62301SP 数据表(PDF) 4 Page - Renesas Technology Corp

部件名 M62301SP
功能描述  10 to 12-bit 4-ch Integrating A/D Converter
PDF  12 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M62301SP 数据表(HTML) 4 Page - Renesas Technology Corp

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M62301SP/FP
REJ03D0861-0300 Rev.3.00 Mar 25, 2008
Page 4 of 11
Operating Description
(1) Decoder
Based on digital inputs to C0, C1, C2, the analog switch is set to on, and the input of "0" scale (GND input), input of
reference scale (reference voltage input), input to A1-A4, or discharge from integration capacitor (CI) is performed.
None of these operations is performed when the "mode 8" input is given:
Mode
1
2
3
4
5
6
7
8
C0
0
1
0
1
0
1
0
1
C1
0
0
1
1
0
0
1
1
C2
0
0
0
0
1
1
1
1
Discharge
GND
VREF
A1
A2
A3
A4
—
(2) A/D conversion
Decoder selection mode
VIN + 0.49 V
VREF + 0.49 V
0.49 V
0.36 V
V (8)
1
2
1
3
1
4 to 7
1
TIN
TREF
TGND
Multiplexer first selects VGND, obtaining minimum pulse TGND. It then selects VREF, obtaining reference pulse TREF.
Input is selected next, obtaining input pulse TIN. VIN is obtained by deducting TGND, as the offset, from TREF and TIN.
VIN = VREF •
TIN − TG
TREF − TG
By measuring voltage at the maximum input for approximately 500
µs under the counter clock of 8 MHz, resolution
of approximately 12 bits can be obtained;
500
µs
125 ns
≈ 212
Note: To ensure discharge from capacitor CI, the decoder input as in the above diagram should stay in mode 1 at least
for the period calculated above:
It is not necessary to measure TGND, and TREF for each channel.
Tdi = (CI ×
)
VIAmax + 0.49
1 mA



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