LTC2301CDEXPBF datasheet(13/24 Pages) LINER

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LTC2301/LTC2305

23015f

APPLICATIONS INFORMATION

Table 2. Channel Conﬁguration for the LTC2301

O/S

IN+

IN–

–

1–

Figure 1a. Example MUX Conﬁgurations

Figure 1b. Changing the MUX Assignment “On the Fly”

CH0

CH1

GND (

–)

2 Single-Ended

1 Differential

+ (–)

– (+)

1 Differential

+ (–)

– (+)

{

23015 F01a

CH0

CH1

CH0

CH1

LTC2305

LTC2301

GND (

–)

1st Conversion

2nd Conversion

–

{{

CH0

CH1

CH0

CH1

23015 F01b

LTC2305

Driving the Analog Inputs

The analog inputs of the LTC2301/LTC2305 are easy to

drive. Each of the analog inputs of the LTC2305 (CH0 and

CH1) can be used as single-ended input relative to GND

or as a differential pair. The analog inputs of the LTC2301

(IN+, IN–) are always conﬁgured as a differential pair.

Regardless of the MUX conﬁguration, the “+” and “–“

inputs are sampled at the same instant. Any unwanted

signal that is common to both inputs will be reduced by

the common mode rejection of the sample-and-hold cir-

cuit. The inputs draw only one small current spike while

chargingthesample-and-holdcapacitorsduringtheacquire

mode. In conversion mode, the analog inputs draw only

a small leakage current. If the source impedance of the

driving circuit is low, the ADC inputs can be driven directly.

Otherwise, more acquisition time should be allowed for a

source with higher impedance.

Input Filtering

The noise and distortion of the input ampliﬁer and other

circuitry must be considered since they will add to the

ADC noise and distortion. Therefore, noisy input circuitry

should be ﬁltered prior to the analog inputs to minimize

noise. A simple 1-pole RC ﬁlter is sufﬁcient for many

applications.

The analog inputs of the LTC2301/LTC2305 can be modeled

as a 55pF capacitor (CIN) in series with a 100Ω resistor

(RON) as shown in Figure 2a. CIN gets switched to the

selected input once during each conversion. Large ﬁlter

RC time constants will slow the settling of the inputs. It

is important that the overall RC time constants be short

enough to allow the analog inputs to completely settle to

12-bit resolution within the acquisition time (tACQ) if DC

accuracy is important.

When using a ﬁlter with a large CFILTER value (e.g. 1μF),

the inputs do not completely settle and the capacitive input

switching currents are averaged into a net DC current(IDC).

In this case, the analog input can be modeled by an equiva-

lent resistance (REQ = 1/(fSMPL • CIN)) in series with an

ideal voltage source (VREFCOMP/2) as shown in Figure 2b.

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