AD8226

Preliminary Technical Data

Rev. PrA | Page 10 of 16

REFERENCE TERMINAL

The output voltage of the AD8226 is developed with respect to

the potential on the reference terminal. This is useful when the

output signal needs to be offset to a precise midsupply level. For

example, a voltage source can be tied to the REF pin to level-

shift the output so that the AD8226 can drive a single-supply

ADC. The REF pin is protected with ESD diodes and should

For the best performance, source impedance to the REF

terminal should be kept below 2 Ω. As shown in Figure 3, the

reference terminal, REF, is at one end of a 50 kΩ resistor.

Additional impedance at the REF terminal adds to this 50 kΩ

resistor and results in amplification of the signal connected to

Only the positive signal path is amplified; the negative path

is unaffected. This uneven amplification degrades CMRR.

INCORRECT

V

CORRECT

AD8226

OP1177

+

–

V

REF

AD8226

REF

Figure 4. Driving the Reference Pin

INPUT VOLTAGE RANGE

The three op amp architecture of the AD8226 applies gain in

the first stage before removing common-mode voltage in the

difference amplifier stage. In addition, the input transistors in

the first stage shift the common mode voltage up one diode

drop (about 650 mV.) Therefore, internal nodes between the

first and second stages (nodes 1 and 2 in Figure 3) experience a

combination of gained signal, common-mode signal, and

650 mV. This combined signal can be limited by the voltage

supplies even when the individual input and output signals are

not. Figure XX through Figure XX show the allowable

common-mode input voltage ranges for various output voltages

and supply voltages.

The following formulas can also be used to understand how the

formulas, along with the input range specifications in Table 1

and Table 3, set the boundaries where the part operates with

best performance.

V

9.

0

2

)

)(

(

V

4.

0

−

+

<

+

<

−

−

S

CM

DIFF

S

V

V

GAIN

V

V

V

V

V

V

GAIN

V

S

REF

CM

DIFF

.6

1

2

2

)

)(

(

−

+

<

+

+

The common-mode input range shifts upwards with temper-

ature. At cold temperatures, the part requires an extra 200 mV

of headroom from the positive supply, and operation near the

negative supply has more margin. Conversely, hot temperatures

require less headroom from the positive supply, but are the worst-

case conditions for input voltages near the negative supply.

LAYOUT

To ensure optimum performance of the AD8226 at the PCB

level, care must be taken in the design of the board layout.

The AD8226 pins are arranged in a logical manner to aid in

this task.

8

7

6

5

1

2

3

4

–IN

REF

+IN

TOP VIEW

(Not to Scale)

AD8226

Figure 5. Pinout Diagram

Common-Mode Rejection Ratio over Frequency

Poor layout can cause some of the common-mode signals to be

converted to differential signals before reaching the in-amp.

Such conversions occur when one input path has a frequency

response that is different from the other. To keep CMRR across

frequency high, input source impedance and capacitance of each

path should be closely matched. Additional source resistance in

the input path (for example, for input protection) should be placed

close to the in-amp inputs, which minimizes their interaction

with parasitic capacitance from the PCB traces.

Parasitic capacitance at the gain setting pins can also affect

CMRR over frequency. If the board design has a component

at the gain setting pins (for example, a switch or jumper), the

part should be chosen so that the parasitic capacitance is as

small as possible.

Power Supplies

A stable dc voltage should be used to power the instrumenta-

tion amplifier. Noise on the supply pins can adversely affect

performance.

A 0.1 µF capacitor should be placed as close as possible to each

supply pin. As shown in Figure 6, a 10 µF tantalum capacitor

can be used farther away from the part. In most cases, it can be

shared by other precision integrated circuits.