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TS4855 数据表(PDF) 20 Page - STMicroelectronics |
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TS4855 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 27 page ![]() TS4855 Application Information 20/27 6 APPLICATION INFORMATION 6.1 BTL Configuration Principle The TS4855 integrates 3 monolithic power amplifiers having BTL output. BTL (Bridge Tied Load) means that each end of the load is connected to two single-ended output amplifiers. Thus, we have: Single ended output 1 = Vout1 = Vout (V) Single ended output 2 = Vout2 = -Vout (V) and Vout1 - Vout2 = 2Vout (V) The output power is: For the same power supply voltage, the output power in BTL configuration is 4 times higher than the output power in single-ended configuration. 6.2 Power dissipation and efficiency Hypotheses: • Voltage and current in the load are sinusoidal (Vout and Iout). • Supply voltage is a pure DC source (Vcc). Regarding the load we have: and and Therefore, the average current delivered by the supply voltage is: The power delivered by the supply voltage is: Psupply = Vcc IccAVG (W) Then, the power dissipated by each amplifier is Pdiss = Psupply - Pout (W) and the maximum value is obtained when: and its value is: Note: This maximum value is only depending on power supply voltage and load values. The efficiency is the ratio between the output power and the power supply The maximum theoretical value is reached when Vpeak = Vcc, so The TS4855 has 3 independent power amplifiers and each amplifier produces heat due to its power dissipation. Therefore, the maximum die temperature is the sum of the each amplifier’s maximum power dissipation. It is calculated as follows: Pdiss speaker = Power dissipation due to the speaker power amplifier. Pdiss head = Power dissipation due to each headphone’s power amplifier. Total Pdiss =Pdiss speaker +Pdiss head1 +Pdiss head2 (W) In most cases, Pdiss head1 = Pdiss head 2, giving: Total Pdiss = Pdiss speaker +2Pdiss head (W) ) W ( R ) Vout 2 ( Pout L 2 RMS = VOUT = VPEAK sinωt (V) IOUT = VOUT R L ----------------- (A) POUT = VPEAK 2 2RL ---------------------- (W) ICC AVG = 2 VPEAK πRL -------------------- (A) ) W ( P P R V 2 2 P OUT OUT L CC diss − π = ∂Pdiss ∂POUT ---------------------- = 0 ) W ( R Vcc 2 max Pdiss L 2 2 π = η = POUT Psup pl y ------------------------ = π VPEAK 4VCC ----------------------- π 4 ----- = 78.5% [] ) W ( P 2 P R P 2 R P V 2 2 TotalP HEAD OUT SPEAKER OUT HEAD L HEAD OUT SPEAKER L SPEAKER OUT CC diss + − + π = |
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