| 数据搜索系统,热门电子元器件搜索 |
|
ADA4932-1YCPZ-R2 数据表(PDF) 24 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADA4932-1YCPZ-R2 数据表(HTML) 24 Page - Analog Devices |
|
24 / 28 page ![]() ADA4932-1/ADA4932-2 Rev. 0 | Page 24 of 28 LAYOUT, GROUNDING, AND BYPASSING As a high speed device, the ADA4932-x is sensitive to the PCB environment in which it operates. Realizing its superior performance requires attention to the details of high speed PCB design. The first requirement is a solid ground plane that covers as much of the board area around the ADA4932-x as possible. However, the area near the feedback resistors (RF), gain resistors (RG), and the input summing nodes (Pin 2 and Pin 3) should be cleared of all ground and power planes (see Figure 64). Clearing the ground and power planes minimizes any stray capacitance at these nodes and thus minimizes peaking of the response of the amplifier at high frequencies. The thermal resistance, θJA, is specified for the device, including the exposed pad, soldered to a high thermal conductivity 4-layer circuit board, as described in EIA/JESD51-7. Figure 64. Ground and Power Plane Voiding in Vicinity of RF and RG Bypass the power supply pins as close to the device as possible and directly to a nearby ground plane. High frequency ceramic chip capacitors should be used. It is recommended that two parallel bypass capacitors (1000 pF and 0.1 µF) be used for each supply. Place the 1000 pF capacitor closer to the device. Further away, provide low frequency bulk bypassing using 10 µF tantalum capacitors from each supply to ground. Signal routing should be short and direct to avoid parasitic effects. Wherever complementary signals exist, provide a symmetrical layout to maximize balanced performance. When routing differential signals over a long distance, keep PCB traces close together, and twist any differential wiring to minimize loop area. Doing this reduces radiated energy and makes the circuit less susceptible to interference. 1.30 0.80 0.80 1.30 Figure 65. Recommended PCB Thermal Attach Pad Dimensions (Millimeters) 0.30 PLATED VIA HOLE 1.30 GROUND PLANE POWER PLANE BOTTOM METAL TOP METAL Figure 66. Cross-Section of 4-Layer PCB Showing Thermal Via Connection to Buried Ground Plane (Dimensions in Millimeters) |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |