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TS4890 数据表(PDF) 25 Page - STMicroelectronics

部件名 TS4890
功能描述  RAIL TO RAIL OUTPUT 1W AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW
PDF  32 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

TS4890 数据表(HTML) 25 Page - STMicroelectronics

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s Power dissipation and efficiency
Hypothesis :
• Voltage and current in the load are sinusoidal
(Vout and Iout)
• Supply voltage is a pure DC source (Vcc)
Regarding the load we have :
and
and
Then, the average current delivered by the supply
voltage is
The power delivered by the supply voltage is
Psupply = Vcc IccAVG (W)
Then, the power dissipated by the amplifier is
Pdiss = Psupply - Pout (W)
and the maximum value is obtained when
and its value is
Remark : This maximum value is only depending
on power supply voltage and load values.
The efficiency is the ratio between the output
power and the power supply
The maximum theoretical value is reached when
Vpeak = Vcc, so
s Decoupling of the circuit
Two capacitors are needed to bypass properly the
TS4890. A power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
Cs has especially an influence on the THD+N in
high frequency (above 7kHz) and indirectly on the
power supply disturbances.
With 100µF, you can expect similar THD+N
performances like shown in the datasheet.
If Cs is lower than 100µF, in high frequency
increase THD+N and disturbances on the power
supply rail are less filtered.
To the contrary, if Cs is higher than 100µF, those
disturbances on the power supply rail are more
filtered.
Cb has an influence on THD+N in lower frequency,
but its function is critical on the final result of PSRR
with input grounded in lower frequency.
If Cb is lower than 1µF, THD+N increase in lower
frequency (see THD+N vs frequency curves) and
the PSRR worsens up
If Cb is higher than 1µF, the benefit on THD+N in
lower frequency is small but the benefit on PSRR
is substantial (see PSRR vs. Cb curves).
Note that Cin has a non-negligible effect on PSRR
in lower frequency. Lower is its value, higher is the
PSRR (see fig. 13).
s Pop and Click performance
In order to have the best performances with the
pop and click circuitry, the formula below must be
follow :
With
and
)
V
(
t
sin
V
V
PEAK
OUT
ω
=
)
A
(
R
V
I
L
OUT
OUT =
)
W
(
R
2
V
P
L
2
PEAK
OUT =
)
A
(
R
V
2
Icc
L
PEAK
AVG
π
=
)
W
(
P
P
R
Vcc
2
2
Pdiss
OUT
OUT
L
π
=
0
P
Pdiss
OUT
=
)
W
(
R
Vcc
2
max
Pdiss
L
2
2
π
=
Vcc
4
V
ply
sup
P
P
PEAK
OUT
π
=
=
η
%
5
.
78
4
=
π
b
in
τ
τ
)
s
(
C
)
R
R
(
in
feed
in
in
×
+
=
τ
)
s
(
C
k
50
b
b
×
=
τ



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