TS615IPWT datasheet(18/27 Pages) STMICROELECTRONICS

18 / 27 page

TS615

18/27

PRINTED CIRCUIT BOARD LAYOUT

CONSIDERATIONS

In this range of frequency, printed circuit board

parasites can affect the closed-loop performance.

The implementation of a proper ground plane in

both sides of the PCB is mandatory to provide low

inductance and low resistance common return.

Most important for controlling the gain flatness

and the bandwidth are stray capacitances at the

output and inverting input. For minimizing the cou-

pling, the space between signal lines and ground

plane will be increased. Connections of the feed-

back components must be as short as possible in

order to decrease the associated inductance

which affect high frequency gain errors. It is very

important to choose external components as small

as possible such as surface mounted devices,

SMD, in order to minimize the size of all the DC

and AC connections.

THERMAL INFORMATION

The TS615 is housed in an Exposed-Pad plastic

package. As described on the figure 56, this pack-

age uses a lead frame upon which the dice is

mounted. This lead frame is exposed as a thermal

pad on the underside of the package. The thermal

contact is direct with the dice. This thermal path

provide an excellent thermal performance.

The thermal pad is electrically isolated from all

pins in the package. It should be soldered to a

copper area of the PCB underneath the package.

Through these thermal paths within this copper ar-

ea, heat can be conducted away from the pack-

age. In this case, the copper area should be con-

nected to (-VCC).

Figure 55 : Exposed-Pad Package

Figure 56 : Evaluation Board

Cross Section View

Bottom View

Side View

DICE

Cross Section View

Bottom View

Side View

DICE

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