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TS635IDW 数据表(PDF) 7 Page - STMicroelectronics |
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TS635IDW 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 10 page ![]() TS635 7/10 Component calculation: Let us consider the equivalent circuit for a single ended configuration, Figure 4. Let us consider the unloaded system. Assuming the currents through R1, R2 and R3 as respectively: As Vo° equals Vo without load, the gain in this case becomes : The gain, for the loaded system will be (1): As shown in Figure 5, this system is an ideal gen- erator with a synthesized impedance as the inter- nal impedance of the system. From this, the out- put voltage becomes: with Ro the synthesized impedance and Iout the output current. On the other hand Vo can be ex- pressed as: By identification of both equations (2) and (3), the synthesized impedance is, with Rs1=Rs2=Rs: Unlike the level Vo° required for a passive imped- ance, Vo° will be smaller than 2Vo in our case. Let us write Vo°=kVo with k the matching factor vary- ing between 1 and 2. Assuming that the current through R3 is negligeable, it comes the following resistance divider: After choosing the k factor, Rs will equal to 1/2RL(k-1). A good impedance matching assumes: From (4) and (5) it becomes: By fixing an arbitrary value for R2, (6) gives: Finally, the values of R2 and R3 allow us to extract R1 from (1), and it comes: with GL the required gain. Figure 4 : Single ended equivalent circuit 1/2 R1 R2 R3 + _ Vi Vo Rs1 -1 Vo° 1/2 RL 2Vi R1 --------- Vi Vo ° – () R2 -------------------------- and Vi Vo + () R3 ------------------------ , G Vo noload () Vi ------------------------------- 1 2R2 R1 ----------- R2 R3 ------- ++ 1 R2 R3 ------- – ----------------------------------- == GL Vo withload () Vi ------------------------------------ 1 2 --- 1 2R2 R1 ----------- R2 R3 ------- ++ 1 R2 R3 ------- – ----------------------------------- 1 () , == Vo ViG () RoIout () – = 2 () , Vo Vi 1 2R2 R1 ----------- R2 R3 ------- ++ 1 R2 R3 ------- – ----------------------------------------------- Rs1Iout 1 R2 R3 ------- – --------------------- 3 () , – = Figure 5 : Equivalent schematic. Ro is the syn- thesized impedance GL (gain for the loaded system) GL is fixed for the application requirements GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3) R1 2R2/[2(1-R2/R3)GL-1-R2/R3] R2 (=R4) Abritrary fixed R3 (=R5) R2/(1-Rs/0.5RL) Rs 0.5RL(k-1) Ro Rs 1 R2 R3 ------- – ----------------- 4 () , = Ro Vi.Gi Iout 1/2 RL Ro kVoRL RL 2Rs1 + --------------------------- = Ro 1 2 ---RL 5 () , = R2 R3 ------- 1 2Rs RL ---------- 6 () , – = R3 R2 1 2Rs RL ---------- – ------------------- = R1 2R2 21 R2 R3 ------- – GL 1 – R 2 R 3 ------- – --------------------------------------------------------- 7 () , = |
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