TSA1201

2/20

ABSOLUTE MAXIMUM RATINGS

OPERATING CONDITIONS

BLOCK DIAGRAM

Symbol

Parameter

Values

Unit

AVCC

0 to 3.3

V

DVCC

0 to 3.3

V

VCCBI

0 to 3.3

V

VCCBE

0 to 3.6

V

Tstg

Storage temperature

+150

°C

ESD

Electrical Static Discharge

- HBM

- CDM-JEDEC Standard

2

1.5

KV

1. All voltages values, except differential voltage, are with respect to network ground terminal. The magnitude of input and output voltages

must never exceed -0.3V or VCC+0V

Symbol

Parameter

Test conditions

Min

Typ

Max

Unit

AVCC

Analog Supply voltage

2.25

2.5

2.7

V

DVCC

Digital Supply voltage

2.25

2.5

2.7

V

VCCBI

Internal (quiet) buffer Supply voltage

2.25

2.5

2.7

V

VCCBE

External (noisy) buffer Supply voltage

2.25

2.5

3.5

V

VREFP

Forced top voltage reference

0.8

-

AVCC

V

VREFM

Bottom internal reference voltage input

0

1

V

stage

stage

stage

1

2

n

Reference

Timing

circuit

Sequencer-phase shifting

Digital data correction

Buffers

IPOL

VREFM

VREFP

CLK

+2.5V

VIN

VINB

DFSB

OEB

DR

DO

TO

D11

OR

INCM

GND

GNDA

+2.5V/3.3V

SRC