74LVT_LVTH574_4

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 04 — 11 September 2008

2 of 16

NXP Semiconductors

74LVT574; 74LVTH574

3.3 V octal D-type flip-flop; 3-state

3.

Ordering information

4.

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVT574D

−40 °C to +85 °C

SO20

plastic small outline package; 20 leads;

body width 7.5 mm

SOT163-1

74LVTH574D

74LVT574DB

−40 °C to +85 °C

SSOP20

plastic shrink small outline package; 20 leads;

body width 5.3 mm

SOT339-1

74LVTH574DB

74LVT574PW

−40 °C to +85 °C

TSSOP20

plastic thin shrink small outline package; 20 leads;

body width 4.4 mm

SOT360-1

74LVTH574PW

74LVT574BQ

−40 °Cto+85 °C

DHVQFN20

plastic dual in-line compatible thermal enhanced very

thin quad flat package; no leads; 20 terminals;

body 2.5

× 4.5 × 0.85 mm

SOT764-1

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram

mna798

D0

D1

D2

D3

D4

D5

D6

D7

OE

CP

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

11

1

12

13

14

15

16

17

18

19

9

8

7

6

5

4

3

2

001aae466

12

13

14

15

16

17

18

1

EN2

11

C1

1D

2

19

9

8

7

6

5

4

3

2

001aae467

D

CP

Q

D0

CP

OE

Q0

D

CP

Q

D1

Q1

D

CP

Q

D2

Q2

D

CP

Q

D3

Q3

D

CP

Q

D4

Q4

D

CP

Q

D5

Q5

D

CP

Q

D6

Q6

D

CP

Q

D7

Q7