PPC5606BECLU datasheet(81/98 Pages) FREESCALE

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Electrical Characteristics

MPC560xS Microcontroller Data Sheet Data Sheet, Rev. 1

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

3.16.3.2

Interface to TFT LCD Panels—Access Level

Figure 29. LCD Interface Timing Parameters—Access Level

3.16.4

External Interrupt (IRQ) and Non-Maskable Interrupt (NMI) Timing

Table 38. LCD Interface Timing Parameters1,2,3,4—Access Level

1 The characteristics in this table are based on the assumption that data is output at +ve edge and displays latch data

on -ve edge

2 Intra bit skew is less than 2 ns

3 Load CL = 50 pf for frequency up to 20 MHz

4 Load CL = 25 pf for display freq from 20 to 32 MHz

Num

Symbol

Characteristic

Min.

Value

Typical

Value

Max. Value

Unit

1tCKP

CC5

5 Parameter values guaranteed by design.

PDI Clock Period

31.25

—

2tCHD

CC5

Duty cycle

—

3tDSU

CC5

interface data setup time

—

4tDHD

CC5

PDI interface data access hold time

—

5tCSU

CC5

PDI interface control signal setup time

—

6tCHD

CC5

PDI interface control signal hold time

—

7CC5

TFT interface data valid after pixel clock

—

8CC5

TFT interface HSYNC valid after pixel clock

—

9CC5

TFT interface VSYNC valid after pixel clock

—

5.5

CC5

TFT interface DE valid after pixel clock

—

5.6

CC5

TFT interface hold time for data and control

bits

2—

CC5

Relative skew between the data bits

—

3.7

DCU_HSYNC

DCU_VSYNC

DCU_DE

DCU_CLK

DCU_LD[23:0]

tCKH

tCKL

tCHD

tCSU

tDHD

tDSU

PPC5606BECLU 数据表(PDF) 81 Page - Freescale Semiconductor, Inc

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