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PCM3168APAPR 数据表(PDF) 47 Page - Texas Instruments |
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PCM3168APAPR 数据表(HTML) 47 Page - Texas Instruments |
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47 / 66 page ![]() PCM3168A PCM3168A-Q1 www.ti.com ......................................................................................................................................................................................... SBAS452 – SEPTEMBER 2008 DEC HEX B7 B6 B5 B4 B3 B2 B1 B0 81 51 — MSAD2 MSAD1 MSAD0 — FMTAD2 FMTAD1 FMTAD0 MSAD[2:0] ADC Master/slave mode select These bits control the audio interface mode for ADC operation. Default value: 000 (slave mode). MSAD ADC Master/slave mode select 000 Slave mode (default) 001 Master mode, 768 fS 010 Master mode, 512 fS 011 Master mode, 384 fS 100 Master mode, 256 fS 101 Reserved 110 Reserved 111 Reserved FMTAD[2:0] ADC Audio interface format select These bits control the audio interface format for ADC operation. The format details and restrictions related to the system clock and master/slave mode are described in the Audio Data Interface Formats and Timing section. Default value: 000 (24-bit I2S format). FMTAD ADC Audio interface format select 000 24-bit I2S format (default) 001 24-bit left-justified format 010 24-bit right-justified format 011 16-bit right-justified format 100 24-bit I2S mode DSP format 101 24-bit left-justified mode DSP format 110 24-bit I2S mode TDM format 111 24-bit left-justified mode TDM format Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 47 Product Folder Link(s): PCM3168A PCM3168A-Q1 |
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