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CS43L22 数据表(PDF) 39 Page - Cirrus Logic

部件名 CS43L22
功能描述  Low Power, Stereo DAC w/Headphone & Speaker Amps
PDF  68 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS43L22 数据表(HTML) 39 Page - Cirrus Logic

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DS792F1
39
CS43L22
Confidential Draft
10/7/08
7.3
Power Control 2 (Address 04h)
7.3.1
Headphone Power Control
Configures how the SPK/HP_SW pin, 6, controls the power for the headphone amplifier.
7.3.2
Speaker Power Control
Configures how the SPK/HP_SW pin, 6, controls the power for the speaker amplifier.
7.4
Clocking Control (Address 05h)
7.4.1
Auto-Detect
Configures the auto-detect circuitry for detecting the speed mode of the CS43L22 when operating as a
slave.
Notes:
1.
The SPEED[1:0] bits are ignored and speed is determined by the MCLK/LRCK ratio.
2.
When AUTO is disabled and the CS43L22 operates in Master Mode, the MCLKDIV2 bit is ignored.
3.
Certain sample and MCLK frequencies require setting the SPEED[1:0] bits, the 32k_GROUP bit
(“32kHz Sample Rate Group” on page 40) and/or the VIDEOCLK bit (“27 MHz Video Clock” on
page 40) and RATIO[1:0] bits (“Internal MCLK/LRCK Ratio” on page 40). Low sample rates may also
affect dynamic range performance in the typical audio band. Refer to the referenced application for
more information.
7
6
5
432
10
PDN_HPB1
PDN_HPB0
PDN_HPA1
PDN_HPA0
PDN_SPKB1
PDN_SPKB0
PDN_SPKA1
PDN_SPKA0
PDN_HPx[1:0]
Headphone Status
00
Headphone channel is ON when the SPK/HP_SW pin, 6, is LO.
Headphone channel is OFF when the SPK/HP_SW pin, 6, is HI.
01
Headphone channel is ON when the SPK/HP_SW pin, 6, is HI.
Headphone channel is OFF when the SPK/HP_SW pin, 6, is LO.
10
Headphone channel is always ON.
11
Headphone channel is always OFF.
PDN_SPKx[1:0]
Speaker Status
00
Speaker channel is ON when the SPK/HP_SW pin, 6, is LO.
Speaker channel is OFF when the SPK/HP_SW pin, 6, is HI.
01
Speaker channel is ON when the SPK/HP_SW pin, 6, is HI.
Speaker channel is OFF when the SPK/HP_SW pin, 6, is LO.
10
Speaker channel is always ON.
11
Speaker channel is always OFF.
7
6
5
432
10
AUTO
SPEED1
SPEED0
32k_GROUP
VIDEOCLK
RATIO1
RATIO0
MCLKDIV2
AUTO
Auto-detection of Speed Mode
0
Disabled
1
Enabled
Application:
“Serial Port Clocking” on page 30



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