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CS495313-CVZ 数据表(PDF) 13 Page - Cirrus Logic

部件名 CS495313-CVZ
功能描述  32-bit Audio Decoder DSP Family
PDF  34 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS495313-CVZ 数据表(HTML) 13 Page - Cirrus Logic

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CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
DS705PP3
Copyright 2008 Cirrus Logic
13
5.9 Switching Characteristics — Internal Clock
Parameter
Symbol
Min
Max
Unit
Internal DCLK frequency1
CS49530x-CVZ
CS49531x-CQZ
CS49531x-CVZ
CS49530x-DVZ
CS49531x-DQZ
CS49531x-DVZ
1. After initial power-on reset, Fdclk = Fxtal. After initial kickstart commands, the PLL is locked to max Fdclk and remains
locked until the next power-on reset.
Fdclk
-
Fxtal
Fxtal
Fxtal
Fxtal
Fxtal
Fxtal
150
150
150
TBD
TBD
TBD
MHz
Internal DCLK period1
CS49530x-CVZ
CS49531x-CQZ
CS49531x-CVZ
CS49530x-DVZ
CS49531x-DQZ
CS49531x-DVZ
DCLKP
-
6.7
6.7
6.7
TBD
TBD
TBD
1/Fxtal
1/Fxtal
1/Fxtal
1/Fxtal
1/Fxtal
1/Fxtal
ns



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