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AT89C5122DS-RDRUM 数据表(PDF) 127 Page - ATMEL Corporation

部件名 AT89C5122DS-RDRUM
功能描述  C51 Microcontroller with USB and Smart Card Reader Interfaces
PDF  208 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

AT89C5122DS-RDRUM 数据表(HTML) 127 Page - ATMEL Corporation

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AT83R5122, AT8xC5122/23
4202F–SCR–07/2008
Figure 67.
Timer 1 Baud Rate Generator Block Diagram
Internal Baud Rate Generator
When using the Internal Baud Rate Generator, the Baud Rate is derived from the over-
flow of the timer. As shown in Figure 68 the Internal Baud Rate Generator is an 8-bit
auto-reload timer feed by the peripheral clock or by the peripheral clock divided by 6
depending on the SPD bit in BDRCON register (see Table 82 on page 134). The Internal
Baud Rate Generator is enabled by setting BRR bit in BDRCON register. SMOD1 bit in
PCON register allows doubling of the generated baud rate.
Figure 68.
Internal Baud Rate Generator Block Diagram
Synchronous Mode (Mode 0)
Mode 0 is a half-duplex, synchronous mode, which is commonly used to expand the I/0
capabilities of a device with shift registers. The transmit data (TXD) pin outputs a set of
eight clock pulses while the receive data (RXD) pin transmits or receives a byte of data.
The 8-bit data are transmitted and received least-significant bit (LSB) first. Shifts occur
at a fixed Baud Rate (see Section “Baud Rate Selection (Mode 0)”). Figure 69 shows
the serial port block diagram in Mode 0.
TR1
TCON.6
0
1
GATE1
TMOD.7
Overflow
C/T1#
TMOD.6
TL1
(8 bits)
TH1
(8 bits)
INT1#
T1
CK_
T1
/ 6
0
1
SMOD1
PCON.7
/ 2
T1
CLOCK
To serial Port
0
1
Overflow
SPD
BDRCON.1
BRG
(8 bits)
BRL
(8 bits)
CK_
SI
/ 6
IBRG
CLOCK
BRR
BDRCON.4
0
1
SMOD1
PCON.7
/ 2
To serial Port



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