AT89C5122DS-RDRUM datasheet(159/208 Pages) ATMEL

159 / 208 page

159

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

INT1 Interrupt Vector

The INT1 interrupt is multiplexed with the following three inputs:

•

INT1 : Standard 8051 interrupt input

•

RXD : Received data on UART

•

CPRES: Insertion or remove of the main card

The setting configurations for each input is detailed below.

INT1 Input

This interrupt input is active under the following conditions :

•

It must be enabled by OEEN Bit (ISEL Register)

•

It can be active on a level or falling edge following IT1 Bit (TCON Register) status

•

If level triggering selection is set, the active level 0 or 1 can be selected with OELEV

Bit (ISEL Register)

The Bit IE1 (TCON Register) is set by hardware when external interrupt detected. It is

cleared when interrupt is processed.

RXD Input

A second vector interrupt input is the reception of a character. UART Rx input can gen-

erate an interrupt if enabled with Bit RXEN (ISEL.0). The global enable bits EX1 and EA

must also be set.

Then, the Bit RXIT (ISEL Register) is set by hardware when a low level is detected on

P3.0/RXD input.

CPRES Input

The third input is the detection of a level change on CPRES input (P1.2). This input can

generate an interrupt if enabled with PRESEN (ISEL.1) , EX1 (IE0.2) and EA (IE0.7)

Bits.

This detection is done according to the level selected with Bit CPLEV (ISEL.7).

Then the Bit PRESIT (ISEL.5) is set by hardware when the triggering conditions are

met. This Bit must be cleared by software.

AT89C5122DS-RDRUM 数据表(PDF) 159 Page - ATMEL Corporation

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