2

1447F–PLD–11/08

ATF750LVC

3.

Pin Configurations

Each of the ATF750LVC’s 22 logic pins can be used as an input. Ten of these can be used as

inputs, outputs or bi-directional I/O pins. Each flip-flop is individually configurable as either

D- or T-type. Each flip-flop output is fed back into the array independently. This allows burying

of all the sum terms and flip-flops.

There are 171 total product terms available. There are two sum terms per output, providing

added flexibility. A variable format is used to assign between four to eight product terms per

sum term. Much more logic can be replaced by this device than by any other 24-pin PLD. With

20 sum terms and flip-flops, complex state machines are easily implemented with logic to

spare.

Product terms provide individual clocks and asynchronous resets for each flip-flop. Each flip-

flop may also be individually configured to have direct input pin controlled clocking. Each out-

put has its own enable product term. One product term provides a common synchronous

preset for all flip-flops. Register preload functions are provided to simplify testing. All registers

automatically reset upon power-up.

Pin Name

Function

CLK

Clock

IN

Logic Inputs

I/O

Bi-directional Buffers

GND

Ground

VCC

3V to 5.5V Supply

3.1

PLCC

Note:

1. For PLCC, pins 1, 8, 15, and 22 can

be left unconnected. For superior

performance, connect VCC to pin 1

and GND to pins 8, 15, and 22.

3.2

DIP/SOIC/TSSOP

5

6

7

8

9

10

11

25

24

23

22

21

20

19

IN

IN

IN

IN

IN

IN

I/O

I/O

I/O

I/O

I/O

I/O

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

CLK/IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

GND

VCC

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

IN