VB125SP datasheet(4/8 Pages) STMICROELECTRONICS

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VB125SP

NOTE 1 Parametric degradation are allowed with 6V < Vbat < 10V and Vbat > 24V.

NOTE 2 In the high voltage clamping structure of this device a temperature compensation has been implemented. The

circuit schematic is shown in fig. 1. The KVbe cell takes care of the temperature compensation. The whole

electrical characteristic of the new circuit is shown in fig. 2. Up to VCE=nVZ no current will flow into the collector (just the

leakage current of the power stage); for nVZ <VCE <VCL a current begins to flow across the resistances of the KVbe

compensation circuit (typical slope

20 K

) as soon as the Vcl is reached the dinamic resistance drop to ~4

protect the device against overvoltage (See Fig. 3).

NOTE 3 The saturation voltage of the Power stage includes the drop on the sensing resistor.

NOTE 4 Considering the different ways of operation of the device (with or without spark, etc...) there are some short

periods of time in which the output terminal (HVC) is pulled below ground by a negative current due to leakage

inductances and stray capacitances of the ignition coil.With VIPower devices, if no corrective action is taken, these

negative currents can cause parasitic glitches on the diagnostic output. To kill this potential problem, a circuit that avoids

the possibility for the HVC to be pulled undeground, by sending the required negative current from the battery is

implemented in the VB125SP.For this reason there are some short periods in which a current exceeding 220 mA flows

in the pin VD.

NOTE 5 A zener protection of 16V (typical) is placed on the supply pin (V

CC) of the chip to protect the internal circuitry.

For this reason, when the battery voltage exceedes that value, the current flowing into Vcc pin can be greater than the

maximum current specified at Vbat=14V (both in power on and power off condictions) : it will be limited by an internal

resistor.

NOTE 6 The primary coil current value Icl must be measured 1 ms after desaturation of the power stage.

NOTE 7 These limits apply with regard to the minimum battery voltage and resistive drop on the coil and cables that permit

to reach the limitation or diagnostic level.

NOTE 8 No internal Pull-Down.

NOTE 9 Tjmin= 150

°C means that the behaviour of the device will not be affected for junction temperature lower than

150

°C.For higher temperature, the thermal protection circuit will begin its action reducing the Icl limit according with the

power dissipation. Chip temperature is a function of the Rth of the whole system in which the device will be operating

(See Fig.4).

NOTE 10 Propagation Time measured from input voltage rising edge to 50% of output voltage falling edge.

NOTE 11 As soon as the input signal is switched low the stored charges in the base of the power transistor are removed

and the so called «Turn-off Delay Time of Coil Current» begins; after at the «Turn-off Fall Time of Coil Current» starts

and, at the same time, the HVC rises.

tdLH is defined as the time between the negative edge of the input pulse to the point where the HVC reaches 100V.

tfLH is defined as the delay between the 90% and the 10% of the coil current.

≅Ω

Ω

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