AT89S8253 datasheet(2/59 Pages) ATMEL

2 / 59 page

3286L–MICRO–8/08

AT89S8253

The AT89S8253 provides the following standard features: 12K bytes of In-System Programma-

ble Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, programmable watchdog timer,

two data pointers, three 16-bit timer/counters, a six-vector, four-level interrupt architecture, a full

duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S8253 is designed

with static logic for operation down to zero frequency and supports two software selectable

power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters,

serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM

contents but freezes the oscillator, disabling all other chip functions until the next external inter-

rupt or hardware reset.

The on-board Flash/EEPROM is accessible through the SPI serial interface. Holding RESET

active forces the SPI bus into a serial programming interface and allows the program memory to

be written to or read from, unless one or more lock bits have been activated.

Pin Configurations

2.1

40P6 – 40-lead PDIP

2.2

44A – 44-lead TQFP

(T2) P1.0

(T2 EX) P1.1

P1.2

P1.3

(SS) P1.4

(MOSI) P1.5

(MISO) P1.6

(SCK) P1.7

RST

(RXD) P3.0

(TXD) P3.1

(INT0) P3.2

(INT1) P3.3

(T0) P3.4

(T1) P3.5

(WR) P3.6

(RD) P3.7

XTAL2

XTAL1

GND

VCC

P0.0 (AD0)

P0.1 (AD1)

P0.2 (AD2)

P0.3 (AD3)

P0.4 (AD4)

P0.5 (AD5)

P0.6 (AD6)

P0.7 (AD7)

EA/VPP

ALE/PROG

PSEN

P2.7 (A15)

P2.6 (A14)

P2.5 (A13)

P2.4 (A12)

P2.3 (A11)

P2.2 (A10)

P2.1 (A9)

P2.0 (A8)