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VN710SP 数据表(PDF) 5 Page - STMicroelectronics |
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VN710SP 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 11 page  5/11 VN710SP TRUTH TABLE (*) Latched on first overtemperature event; latch cleared on next input falling edge. CONDITIONS ENABLE INPUT OUTPUT STATUS Normal operation H H H L L H H H Current limitation H H H L L X H H Overtemperature H H L H L (*) L L (*) L Undervoltage H H H L L L X X Overvoltage H H H L L L H H Output voltage > VOL H H H L H H L H Output current < IOL H H H L L H H L Any L X L H t VOUT 90% 10% dVOUT/dt(off) dVOUT/dt(on) Switching Time Waveforms 80% t VIN td(on) td(off) |
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