PTH08T240F

2

V

I

5

9

+

C

I

220 mF

(Required)

8

R

SET

[A]

1%

0.05 W

(Required)

Track

GND

V

TT

4

3

GND

GND

RTT

1%

0.05W

(Required)

TurboTrans

+Sense

6

L

O

A

D

-Sense

GND

+

11

R

UVLO

1%

0.05 W

(Optional)

Inhibit

INH/UVLO

Track

10

7

-Sense

+Sense

V

O

C

O

1000 mF

(Required)

SYNC

1

SmartSync

C

I

2

22 mF

(Recommended)

V

O

V

I

UDG-07125

PTH08T240F

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

A.

2

Submit Documentation Feedback

Copyright © 2006–2008, Texas Instruments Incorporated

Product Folder Link(s): PTH08T240F