Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the

consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No

license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned

in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.

SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express

written approval of SGS-THOMSON Microelectronics.

© 1996 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved

FUZZYSTUDI O

™ is a trademark of SGS-THOMSON Microelectronics

MS-DOS

®

,Microsoft

®

and Microsoft Windows

®

are registered trademarks of Microsoft Corporation.

MATLAB

®

is a registered trademark of Mathworks Inc.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -

Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

Part Number

Maximum Frequency

Supply Voltage

Temperature Range

Package

STFLWARP11/PG

40 MHz

5

±5%

0

°Cto 70 °C

CPGA100

STFLWARP11/PL

40 MHz

5

±5%

0

°Cto 70 °C

PLCC84

Table 8. Ordering Information

Type

Device

Development Tools

FUZZYST UDIO

™

™ ADB

FUZZYSTUDIO

™

™ SDT

STFLSTUDIO10/KIT

STFLWARP11/PG

STFLWARP11/PL

W.A.R.P. 1.X

W.A.R.P. 1.X programmer

EPROM programmer

RS-232 communication handler

Internal Clock

Variables and Rules Editor

W.A.R.P. Compiler/Debugger

Exporter for ANSI C and MATLAB

®

Order Code

Description

Supported Target

Functionalities

System Requirement

STFLAFM10/SW

WTA-FAM for Building Rules

BACK-FAM for Building MFs

STFLWARP11/PG

STFLWARP11/PL

STFLWARP20/PL

ANSI C

Rules Minimizer

Step-by-Step Simulation

Simulation from File

Local Tuning

MS-DOS 3.1or higher

Windows 3.0 or later

486, PENTIUM compatible

8 MB RAM

Functionsin dedicated memories in order to reduce

the computational time. Therefore a great amount

of W.A.R.P. processing is based on a look-up table

approach rather than on on-line calculation.

Those Membership Functions (MFs), each one

elements, are stored in four internal RAMs (1Kbyte

each). The consequent MFs, due to the different

modelling, are loaded in a single RAM by storing

for each MF its area and its barycentre. This is due

to the adoptionof the Center of Gravity defuzzifica-

tion method.

The downloading phase allows the setting of the

device, in terms of I/O number, universes of dis-

course and MF shapes. During this phase W.A.R.P.

prepares its internal memories for the on-line

elaboration phase and loads the microcode in its

program memory. This microcode, which drives the

on-line phase, is generated by the Compiler (see

W.A.R.P.-SDT User Manual) according to the

adopted configuration. The possible configurations

are shown in table 1.

During the on-line phase (up to 40MHz working

frequency), W.A.R.P. processes the input data and

produces its outputs according to the configuration

loaded in the downloading phase.

W.A.R.P. is conceived to work together with tradi-

tional microcontrollers which shall perform normal

control tasks while W.A.R.P. will be indipendently

responsible for all the fuzzy related computing.

W.A.R.P. is manufactured using the high perform-

ance, reliable HCMOS4T (O.7

µm) SGS-THOMSON

Microelectronics process.

19/19

W.A.R.P.1.1