| 数据搜索系统,热门电子元器件搜索 |
|
HV430 数据表(PDF) 4 Page - Supertex, Inc |
|
|
|||||||||||||||||||||||||||||
HV430 数据表(HTML) 4 Page - Supertex, Inc |
|
4 / 8 page ![]() 4 Truth Table Logic Inputs* Output NIN PIN mode EN RESET External N-Channel External P-Channel MOSFET MOSFET LL H H > Vreset(on) OFF OFF LH H H > Vreset(on) OFF ON HL H H > Vreset(on) ON OFF HH H H > Vreset(on) OFF OFF HX L H > Vreset(on) OFF ON LX L H > Vreset(on) ON OFF XX X L X OFF OFF XX X X < Vreset(off) OFF OFF * Unused logic inputs should be connected to VDD or GND. Block Diagram and Application Circuit Ringer Output Rsense Rsense VDD Up Translator Down Translator Down Translator Up Translator P Driver N Driver Current Trip FAULT PIN NIN RESET De-glitcher DEADBAND ENABLE MODE VDD Control Logic VNN1 VPP1 SIG GND VPP2 Regulator VNN2 Regulator VDD Current Trip PWR GND +5V NC NC VPP1 VPP2 VPSEN VPGATE VNN1 VNN2 VNSEN VNGATE Note: PIN, NIN, and ENABLE are internally pulled low. MODE is internally pulled high. A Reset capacitor in the range of 1-10 µF will yield a couple-second turn-on delay. Tantalum is recommended. 10 µA reset clk HV430 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |