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TC32MEDB 数据表(PDF) 3 Page - TelCom Semiconductor, Inc |
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TC32MEDB 数据表(HTML) 3 Page - TelCom Semiconductor, Inc |
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3 / 4 page ![]() 5-5 TELCOM SEMICONDUCTOR, INC. 7 6 5 4 3 1 2 8 TC32M RS VIL VIH V DD V RST t RST t RPD Figure 3. Power Up / Down Reset Timing Figure 1. Watchdog Strobe Figure 2. RS Pulled Low by Push-button Reset PB CLOSED PB OPEN RS VIH tRST VIL VSTL (MAX) tST tTD RS Note: tTD is the maximum elapsed time between strobes which will keep the watchdog timer from forcing RS LOW. (A STROBE is defined as a high-to-low transition from VSTH to VSTL). V STH (MIN) V STL (MIN) Pin No. Symbol Description 1 GND Ground. 2VDD The +5V power supply input. 3 RS RESET/STROBE (Bidirectional). The open drain goes active if: 1. VDD falls below 4.5V nominal. 2. If pulled low by an external electronic signal or switch closure. 3. If the watchdog is not strobed within the minimum watchdog timeout period. 4. During power-up and power-down. In the input mode, RS connects to a voltage level shift network (typically a resistor divider to VDD.) The watchdog timer is reset when processor causes a voltage level ≤ VSTL to be applied to RS. 4VDD The +5V power supply input. (SOT-223 only). PIN DESCRIPTION ECONOMONITOR™ – 3-PIN SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR AND WATCHDOG |
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