数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

LTC1273ACSW 数据表(PDF) 19 Page - Linear Technology

部件名 LTC1273ACSW
功能描述  12-Bit, 300ksps Sampling A/D Converters with Reference
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC1273ACSW 数据表(HTML) 19 Page - Linear Technology

Back Button LTC1273ACSW Datasheet HTML 15Page - Linear Technology LTC1273ACSW Datasheet HTML 16Page - Linear Technology LTC1273ACSW Datasheet HTML 17Page - Linear Technology LTC1273ACSW Datasheet HTML 18Page - Linear Technology LTC1273ACSW Datasheet HTML 19Page - Linear Technology LTC1273ACSW Datasheet HTML 20Page - Linear Technology LTC1273ACSW Datasheet HTML 21Page - Linear Technology LTC1273ACSW Datasheet HTML 22Page - Linear Technology LTC1273ACSW Datasheet HTML 23Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 24 page
background image
19
LTC1273
LTC1275/LTC1276
127356fa
S
APPLICATI
I FOR ATIO
TMS320C25
Figure 17 shows an interface between the LTC1273 and
the TMS320C25.
The W/R signal of the DSP initiates a conversion and
conversion results are read from the LTC1273 using the
following instruction:
IN
D, PA
where D is Data Memory Address and PA is the PORT
ADDRESS.
Figure 17. TMS320C25 Interface
DATA BUS
LTC1273/75/76 • F17
ADDRESS BUS
D0
D16
R/W
READY
IS
A1
A16
TMS320C25
ADDRESS
DECODE
EN
D0/8
D11
RD
BUSY
CS
HBEN
LTC1273/75/76
ADDITIONAL PINS OMITTED FOR CLARITY
DATA BUS
LTC1273/75/76 • F18
ADDRESS BUS
D0
D11
R/W
DTACK
AS
A1
A23
MC68000
ADDRESS
DECODE
EN
D0/8
D11
RD
BUSY
CS
HBEN
LTC1273/75/76
ADDITIONAL PINS OMITTED FOR CLARITY
Figure 18. MC68000 Interface
8085A/Z80 Microprocessor
Figure 19 shows an LTC1273 interface for the Z80/8085A.
The LTC1273 is operating in the Slow Memory Mode and
a two byte read is required. Not shown in the figure is the
8-bit latch required to demultiplex the 8085A common
address/data bus. A0 is used to assert HBEN so that an
even address (HBEN = LOW) to the LTC1273 will start a
conversion and read the low data byte. An odd address
(HBEN = HIGH) will read the high data byte. This is
accomplished with the single 16-bit LOAD instruction
below.
For the 8085A
LHLD (B000)
For the Z80
LDHL, (B000)
Figure 19. 8085A and Z80 Interface
DATA BUS
LTC1273/75/76 • F19
ADDRESS BUS
D0
D7
RD
WAIT
MREQ
A0
A15
Z80
8085A
ADDRESS
DECODE
EN
D0/8
D7
RD
BUSY
CS
HBEN
ADDITIONAL PINS OMITTED FOR CLARITY
LTC1273/75/76
A0
MC68000 Microprocessor
Figure 18 shows a typical interface for the MC68000. The
LTC1273 is operating in the Slow Memory Mode. Assum-
ing the LTC1273 is located at address C000, then the
following single 16-bit MOVE instruction both starts a
conversion and reads the conversion result:
Move.W $C000,D0
At the beginning of the instruction cycle when the ADC
address is selected, BUSY and CS assert DTACK so that
the MC68000 is forced into a WAIT state. At the end of
conversion, BUSY returns high and the conversion result
is placed in the D0 register of the microprocessor.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com