LTC1555L

7

APPLICATIO S I FOR ATIO

open drain (all SIM I/O pins are open drain). Internal

pull-up resistors are provided for both the DATA pin and

the I/O pin on the SIM side. The second method is to use

the DDRV pin to send data to the SIM and use the DATA pin

to receive data from the SIM. When the DDRV pin is not

is forced below 1.2V, an undervoltage lockout circuit

forces the LTC1555L into shutdown mode regardless of

the status of the M0-M1 pins.

10kV ESD Protection

withstand over 10kV of human body model ESD. In order

to ensure proper ESD protection, careful board layout is

required. The GND pin should be tied directly to a GND

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Figure 1a. Level Translator Connections for

Bidirectional Controller DATA Pin

Figure 1b. Level Translator Connections for

One-Directional Controller Side DATA Flow

CIN

RIN

DATA

DDRV

CLK

RST

I/O

CLK TO SIM

RST TO SIM

DATA TO/FROM SIM

LTC1555L

CONTROLLER

SIDE

SIM SIDE

1555L F01a

CIN

RIN

DATA

DDRV

CLK

RST

I/O

CLK TO SIM

RST TO SIM

DATA FROM SIM

DATA TO SIM

LTC1555L

CONTROLLER

SIDE

SIM SIDE

1555L F01b