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80C52 数据表(PDF) 21 Page - TEMIC Semiconductors |
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80C52 数据表(HTML) 21 Page - TEMIC Semiconductors |
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21 / 54 page ![]() Rev. B - Jan. 25, 1999 21 Preliminary TS80C52X2 6.4.5 Reset Addresses On reset, the SADDR and SADEN registers are initialized to 00h, i.e. the given and broadcast addresses are XXXX XXXXb (all don’t-care bits). This ensures that the serial port will reply to any address, and so, that it is backwards compatible with the 80C51 microcontrollers that do not support automatic address recognition. SADEN - Slave Address Mask Register (B9h) Reset Value = 0000 0000b Not bit addressable SADDR - Slave Address Register (A9h) Reset Value = 0000 0000b Not bit addressable 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 |
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