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LTC4265IDE-PBF 数据表(PDF) 5 Page - Linear Technology |
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LTC4265IDE-PBF 数据表(HTML) 5 Page - Linear Technology |
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5 / 20 page ![]() LTC4265 5 4265f PIN FUNCTIONS SHDN (Pin 1): Shutdown Input. Use this pin for auxiliary power application. Drive SHDN high to disable LTC4265 operation and corrupt the signature resistance. If unused, tie SHDN to VIN. T2PSE (Pin 2): Type-2 PSE Indicator, Open-Drain. Low impedance indicates the presence of a Type-2 PSE. RCLASS (Pin 3): Class Select Input. Connect a resistor between RCLASS and VIN to set the classification load current. (See Table 2.) NC (Pin 4, 11): No Connect. VIN (Pins 5, 6): Input Voltage, Negative Rail. Pins 5 and 6 must be electrically tied together at the package. VOUT (Pins 7, 8): Output Voltage Negative Rail. Connects VOUT to VIN through an internal power MOSFET. Pins 7 and 8 must be electrically tied together at the package. PWRGD (Pin 9): Power Good Output, Open Collector. High impedance signals power-up completion. PWRGD is referenced to VOUT and features a 14V clamp. PWRGD (Pin 10): Complementary Power Good Output, Open-Drain. Low impedance signals power up completion. PWRGD is referenced to VIN. GND (Pin 12): Input Voltage, Positive Rail. This pin is connected to the PD positive rail. Exposed Pad (Pin 13): Tie to VIN and PCB heat sink. BLOCK DIAGRAM 4265 BD BOLD LINE INDICATES HIGH CURRENT PATH 12 T2PSE 2 RCLASS 3 NC 4 SHDN PWRGD GND 11 NC 1 10 PWRGD 9 VOUT 8 VOUT 7 CONTROL CIRCUITS CLASSIFICATION CURRENT LOAD REF – + 25k 14k EXPOSED PAD 13 VIN 6 VIN 5 EN |
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