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LTM4601A 数据表(PDF) 21 Page - Linear Technology

部件名 LTM4601A
功能描述  12A DC/DC 關Modules with PLL, Output Tracking and Margining
PDF  28 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTM4601A 数据表(HTML) 21 Page - Linear Technology

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LTM4601A/LTM4601A-1
21
4601afb
Figure 16. 5V at 8A Design Without Differential Amplifier
Solution
Lower the switching frequency at lower input voltages
to allow for higher duty cycles, and meet the 400ns
minimum off time at 4.5V input voltage. The off time
should be about 500ns with 100ns guard band. The duty
cycle for (3.3V/4.5) ≈ 73%. Frequency = (1 – DC)/tOFF, or
(1 – 0.73)/500ns = 540kHz. The switching frequency needs
to be lowered to 540kHz at 4.5V input. tON = DC/frequency,
or 1.35μs. The fSET pinvoltagecomplianceis1/3ofVIN, and
the IfSET current equates to 38μA with the internal 39.2k.
The IfSET current needs to be 24μA for 540kHz operation.
A resistor can be placed from VOUT to fSET to lower the
effective IfSET current out of the fSET pin to 24μA. The fSET
pin is 4.5V/3 =1.5V and VOUT = 3.3V, therefore 130k will
source 14μA into the fSET node and lower the IfSET cur-
rent to 24μA. This enables the 540kHz operation and the
4.5V to 20V input operation for down converting to 3.3V
output. The frequency will scale from 540kHz to 1.1MHz
over this input range. This provides for an effective output
current of 8A over the input range.
APPLICATIONS INFORMATION
VOUT
VFB
MARG0
MARG1
VOUT_LCL
NC3
NC1
NC2
PGOOD
MPGM
RUN
COMP
INTVCC
DRVCC
TRACK/SS
PLLIN
LTM4601A-1
R1
392k
1%
RfSET
100k
RSET
8.25k
C3
100μF
6.3V
SANYO POSCAP
4601A F16
VOUT
5V
8A
TRACK/SS CONTROL
REVIEW TEMPERATURE
DERATING CURVE
C6 100pF
REFER TO
TABLE 2
C2
10μF
25V
IMPROVE
EFFICIENCY
FOR 12V INPUT
C1
10μF
25V
R4
100k
R2
100k
VIN
VOUT
fSET
PGND
MARGIN CONTROL
SGND
5% MARGIN
VIN
10V TO 20V
CMSSH-3C
SOT-323
+



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