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LTC2410IGN 数据表(PDF) 46 Page - Linear Technology

部件名 LTC2410IGN
功能描述  24-Bit No Latency DSTM ADC with Differential Input and Differential Reference
PDF  48 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC2410IGN 数据表(HTML) 46 Page - Linear Technology

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LTC2410
46
TYPICAL APPLICATIO S
Figure 57. 24-Bit A/D Demo Board Schematic
Figure 58. Display Graphic
JP4
JUMPER
2
3
1
1
P1
DB9
6
9
2
7
3
8
4
5
+
2410 F57
R1
10
Ω
J1
VEXT
D1
BAV74LT1
C4
100
µF
16V
VOUT VIN
GND
U2
LT1236ACN8-5
U3E
74HC14
62
11
10
14
3
13
4
12
5
16
6
15
10
9
8
7
1
11
2
3
21
1
1
4
U3F
74HC14
13
12
U3B
74HC14
3
4
U3A
74HC14
1
2
U3C
74HC14
6
5
U3D
74HC14
8
3
2
1
9
+
C3
10
µF
35V
VOUT VIN
GND
U1
LT1460ACN8-2.5
62
4
+
C1
10
µF
35V
+
C2
22
µF
25V
C6
0.1
µF
+
C5
10
µF
35V
VCC
VCC
VCC
J2
GND
J3
VCC
1
1
J5
GND
1
J7
REF –
BANANA JACK
1
J6
REF+
BANANA JACK
1
J4
VEXT
BANANA JACK
1
J8
VIN+
BANANA JACK
1
J9
VIN–
BANANA JACK
1
J10
GND
BANANA JACK
R3
51k
R4
51k
R6
3k
Q1
MMBT3904LT1
R5
49.9
Ω
R7
22k
R8
51k
REF+
FO
REF –
SCK
VIN+
SDO
VIN–
GND
GND
GND
CS
VCC
GND
GND GND GND
JP3
JUMPER
2
3
1
C7
0.1
µF
BYPASS CAP
FOR U3
NOTES:
INSTALL JUMBER JP1 AT PIN 1 AND PIN 2
INSTALL JUMBER JP2 AT PIN 1 AND PIN 2
INSTALL JUMBER JP3 AT PIN 1 AND PIN 2
VCC
JP5
JUMPER
1
2
JP1
JUMPER
2
3
1
JP2
JUMPER
2
1
R2
3
Ω
U4
LTC2410CGN



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