LTC2921/LTC2922 Series

9

29212fa

Electronic Circuit Breaker

supply. The electronic circuit breaker trips when the

voltage across the resistor is >50mV for more than 1

µs. A

trip causes a fault condition which interrupts the monitor

OPERATIO

sequence, and which requires reset of the circuit breaker

latch (see Interrupting Events section). Breaker reset is

achieved by pulling V1 below the reset threshold for

>150

µs after the current falls below the trip point, or by

The timing of a typical start-up sequence for the LTC2921/

lockout level at time 0. All monitor inputs settle between

the 0.5V monitor threshold and the 0.7V overvoltage

threshold by time 1, then a TIMER cycle starts. The TIMER

pin reaches 1.2V at time 2, and GATE ramping begins.

When the GATE ramp completes at time 3, the automatic

remote sense switches close. Another TIMER delay

begins at time 4 and finishes at time 5, at which time PG

is activated.

The timing of a monitor failure and subsequent regular

turn-on is shown in Figure 3. Prior to time 1, a successful

turn-on sequence had completed. At time 1, monitor V2

falls below the 0.5V reference, triggering an error. The

GATE pin, PG pin, and the remote sense switches fall at

rates determined by the pull-down currents and loading

conditions of each (times 2, 3, 4). At time 5, monitor V2

recovers, and a normal turn-on sequence begins.

TI I G DIAGRA S

SENSE

V1

V2

V3

V4

TIMER

GATE

PG

01

2

3

4

5

0.7V

0.5V

0.7V

0.5V

0.7V

0.5V

0.7V

0.5V

1.2V

1.2V

UNDERVOLTAGE

LOCKOUT LEVEL

REMOTE

SENSE

SWITCH

GATE

SENSE

V1

V2

V3

V4

TIMER

GATE

PG

12 3 4

5

0.7V

0.5V

0.7V

0.5V

0.7V

0.5V

0.7V

0.5V

0.7V

0.5V

1.2V

1.2V

UNDERVOLTAGE

LOCKOUT LEVEL

REMOTE

SENSE

SWITCH

GATE

Figure 2. Typical Start-Up Sequence

Figure 3. Monitor Failure and Start-Up Sequence Timing