LTC3549

13

3549f

APPLICATIO S I FOR ATIO

Board Layout Considerations

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3549. These items are also illustrated graphically

in the layout diagram of Figure 3. Check the following in

your layout.

and GND (Pins 2, 7) as close as possible? This capacitor

provides the AC current to the internal power MOSFETs

and their drivers.

3. The resistor divider, R1 and R2, must be connected

terminated near GND (Exposed Pad). The feedback

Figure 3a. Buck Regulator Top Layer

nents and traces, such as the SW line (Pin 3), and its

trace should be minimized.

4. Keep sensitive components away from the SW pins.

should be routed away from the SW traces and the

inductors.

5. A ground plane is preferred, but if not available, keep

the signal and power grounds segregated with small

signal components returning to the GND pin at one

point. They should not share the high current path of

6. Flood all unused areas on all layers with copper. Flooding

with copper will reduce the temperature rise of power

components. These copper areas should be connected

Figure 3b. Buck Regulator Bottom Layer