 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
BQ2012SN 数据表(PDF) 2 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
BQ2012SN 数据表(HTML) 2 Page - Texas Instruments |
|
|
2 / 20 page  Pin Descriptions LCOM LED common output Open-drain output switches VCC to source current for the LEDs. The switch is off dur- ing initialization to allow reading of the soft pull-up or pull-down program resistors. LCOM is also high impedance when the dis- play is off. SEG1– SEG6 LED display segment outputs (dual func- tion with PROG1–PROG6) Each output may activate an LED to sink the current sourced from LCOM. PROG1– PROG2 Programmed full count selection inputs (dual function with SEG1–SEG2) These three-level input pins define the pro- grammed full count (PFC) thresholds de- scribed in Table 2. PROG3– PROG4 Gas gauge rate selection inputs (dual function with SEG3–SEG4) These three-level input pins define the scale factor described in Table 2. PROG5 Self-discharge rate selection (dual func- tion with SEG5) This three-level input pin defines the selfdis- charge compensation rate shown in Table 1. PROG6 Display mode selection (dual function with SEG6) This three-level pin defines the display op- eration shown in Table 1. CHG Charge control output This open-drain output becomes active low when charging is allowed. Valid charging conditions are described in the Charge Con- trol section. SR Sense resistor input The voltage drop (VSR) across the sense re- sistor RS is monitored and integrated over time to interpret charge and discharge activ- ity. The SR input is tied to the high side of the sense resistor. VSR <VSS indicates dis- charge, and VSR >VSS indicates charge. The effective voltage drop (VSRO) as seen by the bq2012 is VSR +VOS (see Table 5). DISP Display control input DISP high disables the LED display. DISP tied to VCC allows PROGX to connect directly to VCC or VSS instead of through a pull-up or pull-down resistor. DISP floating allows the LED display to be active during a valid charge or during discharge if the NAC regis- ter is updated at a rate equivalent to VSRO ≤ -4mV. DISP low activates the display. See Table 1. SB Secondary battery input This input monitors the single-cell voltage potential through a high-impedance resis- tive divider network for end-of-discharge voltage (EDV) thresholds, maximum charge voltage (MCV), and battery removed. EMPTY Battery empty output This open-drain output becomes high- impedance on detection of a valid end-of- discharge voltage (VEDVF) and is low following the next application of a valid charge. DQ Serial I/O pin This is an open-drain bidirectional pin. REF Voltage reference output for regulator REF provides a voltage reference output for an optional micro-regulator. VCC Supply voltage input VSS Ground 2 bq2012 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
