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424H4B-9 数据表(PDF) 2 Page - Frequency Devices, Inc.

部件名 424H4B-9
功能描述  32-Pin DIP 4-Pole Filters
PDF  12 Pages
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制造商  FREQUENCYDEVICES [Frequency Devices, Inc.]
网页  http://www.freqdev.com/
标志 FREQUENCYDEVICES - Frequency Devices, Inc.

424H4B-9 数据表(HTML) 2 Page - Frequency Devices, Inc.

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4-Bit Programmable Filters
424 Series
Digital Tuning &
Control Characteristics
1784 Chessie Lane, Ottawa, IL 61350 • Tel: 800/252-7074, 815/434-7800 • FAX: 815/434-8176
e-mail: sales@freqdev.com • Web Address: http://www.freqdev.com
Digital Tuning Characteristics
The digital tuning interface circuits are a parallel set of CMOS
switches which accept CMOS compatible inputs for the four
tuning bits (D 0 - D 3).
Binary Tuning Range
Pin-Out Key
IN
Analog Input Signal
D3
Tuning Bit 3 (MSB)
OUT Analog Output Signal
D2
Tuning Bit 2
GND Power and Signal Return D1
Tuning Bit 1
+Vs Supply Voltage, Positive D0
Tuning Bit 0 (LSB)
-Vs Supply Voltage, Negative +5V Logic Power
Os
Offset Adjustment
Data Input Specifications
Input Data Levels
(+5Vdc CMOS Logic)
Input Voltage (Vs=15 Vdc)
Low Level In
0 Vdc min.
0.5 Vdc max.
High Level In
3.5 Vdc min.
5.0 Vdc max.
Input Current
High Level In
-0.4mAtyp.
-2.0mAmax.
Low Level In
+0.4mAtyp.
+2.0mAmax.
Input Capacitance
20 pF typ.
30 pF max.
Input Data Format
Frequency Select Bits
Positive Logic
Logic “1” = (+5Vdc)
Logic “0” = Gnd
Bit Weight
(Binary-Coded)
D0
LSB (least significant bit)
D3
MSB (most significant bit)
Frequency Range16:1 Binary Weighted
MSB
---
---
LSB
Bit
Weight
23
22
21
20
fc - corner
D3
D2
D1
D0
frequency
00
0
0
fmax/16
00
0
1
f
max /8
00
1
1
fmax/4
01
1
1
fmax/2
11
1
1
max
Binary T uning Equation:
fc = (f max/16) [1+ D 3 x 2 3 + D2 x 2 2 + D1 x 2 1 + D0 x 2 0]
where D 1 - D 3 = “0” or “1”, and
fmax = Maximum tuning frequency
fc = Corner frequency;
Minimum tunable frequency = f max/16 (D 0 thru D3 = 0);
Minimum frequency step (Resolution) = f
max /16
Discrete Frequencies
FD 0
D1
D2
D3
F B
00
0
0
F 1
10
0
0
F 2
11
0
0
F 3
11
1
0
F 4
11
1
1
Discrete Tuning Equation:
fc = FB + D0[f0] + D1[f1] + D2[f2] + D3[f3]
f0, f1, f2, f3 are the incremental frequency shifts for the data
bits D0, D1, D2 and D3. They are selected to realize the five
customer specified programming frequencies FB -> F4. Other
programming codes produce valid fc’s between FB and F4.
2
Bottom View
0.80"
0.70"
0.10"
0.00"
-Vs
IN
D0
D1
D3
Os
OUT
D2
+5V
GND
+Vs
f



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