8-2

Functional Diagram

IEC Logic Symbol

TRUTH TABLE (Note 1)

OUTPUT

ENABLE

LATCH

ENABLE

DATA

OUTPUT

L

HHH

LHL

L

LL

l

L

LLh

H

HX

X

Z

NOTE:

1. H = HIGH Voltage Level

L = LOW Voltage Level

l = Low voltage level one set up time prior to the high to low latch enable transition.

h = High voltage level one set up time prior to the high to low latch enable transition.

X = Irrelevant

Z = High Impedance

2

3

4

5

6

7

8

9

19

18

17

16

15

14

13

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

D0

D1

D2

D3

D4

D5

D6

D7

11

GND = PIN 10

1

LE

OE

12

CD74FCT573, CD74FCT573AT

19

18

17

16

EN

1

2

3

4

5

15

14

13

12

6

7

8

9

C1

11

1D

CD74FCT573, CD74FCT573AT