HC321 datasheet(13/26 Pages) ALTERA

13 / 26 page

Chapter 1: DC and Switching Characteristics of HardCopy III Devices

1–11

Electrical Characteristics

Altera Corporation

HardCopy III Device Handbook, Volume 3

Power Consumption

Altera offers two ways to estimate power for a design: the Excel-based Early Power

Estimator and the Quartus® II PowerPlay Power Analyzer feature.

Use the interactive Excel-based Early Power Estimator prior to designing in order to

get a magnitude estimate of the device power. The Quartus II PowerPlay Power

Analyzer provides better quality estimates based on the specifics of the design after

the place-and-route is complete. The PowerPlay Power Analyzer can apply a

combination of user-entered, simulation-derived, and estimated signal activities

which, combined with detailed circuit models, can yield very accurate power

estimates.

See Table 1–4 on page 1–5 for supply current estimates for V

CCPGM and VCC_CLKIN. Use

the EPE and PowerPlay Power Analyzer for current estimates of the remaining power

supplies.

f For more information about power estimation tools, refer to the Power Play Early

Power Estimator User Guide and the PowerPlay Power Analysis chapter in volume 3 of

the Quartus II Device Handbook.

2.5V LVDS

(Column

I/O)

2.375

2.5

2.625

100

VCM = 1.25V

—

0.05

(2)

Dmax

≤ 700

Mbps

1.8

(2)

0.247

—

0.6

1.0

1.25

1.5

2.375

2.5

2.625

100

VCM = 1.25V

—

1.05

(2)

Dmax > 700

Mbps

1.55

(2)

—————

1.5

RSDS

(Row I/O)

2.375

2.5

2.625

100

VCM = 1.25V

—

0.3

—

1.4

0.1

0.2

0.6

0.5

1.2

1.4

RSDS

(Column

I/O)

2.375

2.5

2.625

100

VCM = 1.25V

—

0.3

—

1.4

0.1

0.2

0.6

0.5

1.2

1.5

Mini-LVDS

(Row I/O)

2.375

2.5

2.625

200

—

600

0.4

—

1.325

0.25

—

0.6

0.5

1.2

1.4

Mini-LVDS

(Column

I/O)

2.375

2.5

2.625

200

—

600

0.4

—

1.325

0.25

—

0.6

0.5

1.2

1.5

LVPECL (3)

2.375

(4)

2.5

(4)

2.625

(4)

300

—

0.6

Dmax

≤ 700

Mbps

1.8

(5)

——————

————

—

0.6

Dmax

≤ 700

Mbps

1.6

(5)

——————

Notes to Table 1–17:

(1) RL range: 90 ≤ RL ≤ 110 Ω .

(2) For data rate: Dmax > 700 Mbps, the minimum input voltage is 1.0 V, the maximum input voltage is 1.6 V. For Dmax ≤ 700 Mbps, the minimum input

voltage is 0 V, the maximum input voltage is 1.85 V.

(3) Column and Row I/O banks support LVPECL I/O standards for input operation only on dedicated clock input pins. Differential clock inputs in

column I/O use VCC_CLKIN which should be powered by 2.5 V. Differential clock inputs in row I/Os are powered by VCCPD.

(4) Power supply for column I/O LVPECL differential clock input buffer is VCC_CLKIN.

(5) For data rate Dmax > 700 Mbps, the minimum input voltage is 0.85 V, and the maximum input voltage is 1.75 V. For data rate Dmax ≤ 700 Mbps, the

minimum input voltage is 0.45 V, and the maximum input voltage is 1.95 V.

Table 1–17. Differential I/O Standard Specifications – Preliminary (Part 2 of 2)

I/O Standard

CCIO (V)

ID (mV)

IC M (DC ) (V)

OD (V ) (1)

OCM (V ) (1)

Min

Typ

Max

Min

Condition

Max

Min

Condition

Max

Min

Typ

Max

Min

Typ

Max

HC321 数据表(PDF) 13 Page - Altera Corporation

HC321 数据表(HTML) 13 Page - Altera Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

数据表下载

链接网址

HC321 数据表(PDF) 13 Page - Altera Corporation

HC321 数据表(HTML) 13 Page - Altera Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

数据表 下载

链接网址

数据表下载