SN54ACT32, SN74ACT32

QUADRUPLE 2INPUT POSITIVEOR GATES

SCAS530C − AUGUST 1995 − REVISED OCTOBER 2003

2

POST OFFICE BOX 655303

logic diagram, each gate (positive logic)

A

B

Y

−0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±200 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

86

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package

96

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package

80

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package

76

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package

113

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)

SN54ACT32

SN74ACT32

UNIT

MIN

MAX

MIN

MAX

UNIT

VCC

Supply voltage

4.5

5.5

4.5

5.5

V

VIH

High-level input voltage

2

2

V

VIL

Low-level input voltage

0.8

0.8

V

VI

Input voltage

0

VCC

0

VCC

V

VO

Output voltage

0

VCC

0

VCC

V

IOH

High-level output current

−24

−24

mA

IOL

Low-level output current

24

24

mA

∆t/∆v

Input transition rise or fall rate

8

8

ns/V

TA

Operating free-air temperature

−55

125

−40

85

°C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.