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SPWLM386D 数据表(PDF) 2 Page - SeCoS Halbleitertechnologie GmbH |
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SPWLM386D 数据表(HTML) 2 Page - SeCoS Halbleitertechnologie GmbH |
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2 / 6 page ![]() http:/ 01-Jun-2002 Rev. A Page 2 of 6 Abs olute Maximum R atings (Note 2) P arameter S ymbol Value Unit /www.SeCoSGmbH.com/ Elektronische Bauelemente Any changing of specification will not be informed individual this pin (with a 5.0uF capacitor at Pin 2) on time of the circuit is affected by the nd resistor set low frequency rolloff and input impedance. The Supply Voltage VCC 15 V Power Dissipation Pd 1.25 W Input Voltage Vi -0.4 ~ +0.4 V Operating Temperature Topr 0 ~ 70 : Storage Temperature Tstg -65 ~ 150 : Junction Temperature Tj 150 : Electrical Characteristics (TA=25 : Note1, 2) Parameter Symbol Test Conditions Min Typ. Max. Unit Operating Supply Voltage VS 4 - 12 V Quiescent Current IQ VS=6V, VIN=0 - 4 8 mA Output Power PO VS=6V, RL=8 , THD=10% VS=9V, RL=8 , THD=10% 230 480 - - - - mW Voltage Gain GV VS=6V, f=1kHz 10 F form Pin1 to Pin8 - 26 46 - dB Bandwidth BW VS=6V, Pin1 to Pin8 open - 300 - kHz Total Harmonic Distortion THD PO=125mW, VS=6V, f=1kHz RL=8 , Pin1 to Pin8 open - 0.2 - % Power Supply Rejection Ration PSRR V S =6V , f=1kHz, CBYPASS=10 F Pin1 and Pin8 open , Referred to output - 50 - dB Input Resistance RIN - 50 - k Input Bias Current IBIAS VS=6V, Pin2 to Pin3 open - 250 - nA Note1: All voltages are measured with respect to the ground pin, unless otherwise specified. Note2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note3: For operation in ambient temperatures above 25 : , the device must be derated based on a 150 : maximum junction temperature and 1) a thermal resistance of 107 : /W, junction to ambient for the dual-in-line package and 2)a thermal resistance of 170 : /W for the small outline package. Application Hints Gina Control To make the SPWLM386D a more versatile amplifier, two pins (1 and 8) are provided for gain control. With pins 1 and 8 open the 1.35K resistor sets the gain at 20 (26dB),If a capacitor is put from pin 1 to 8,bypassing the 1.35k resistor, the gain will go up to 200 (46dB). If a resistor is placed in series with the capacitor the gain can be set to any value from 20 to 200.Gain control can also be done by capacitively coupling a resistor (or FET) prom pin 1 to ground. Additional external components can be placed in parallel with the internal feedback resistors to tailor the gain and frequency response for individual applications. For example we can compensate poor speaker bass response by frequency shaping the feedback path. This is done with a series RC from pin 1 to 5 (paralleling the internal 15k resistor). For 6 dB effective bass boost: R=15k , the lowest value for good stable operation in R=10k , if pin 8 is open, If pins 1 and 8 are bypassed then R as low as 2k can be used. This restriction is because the amplifier is only compensated for closed-loop gains greater than 9. Input Biasing The schematic show that both input are biased to ground with a 50k resistor. The base current of the input transistors is about 250nA, so the inputs are at about 12.5mW when left open. If the dc source resistance driving the SPWLM386D is higher than 250k it will contribute very little additional offset (about 2.5mW at the input, 50mW at the output). If the dc source resistance is less than 10k, then shorting the unused input to ground will keep the offset low (about 2.5mW at the input, 50mW at the output). For dc source resistance between these values we can eliminate excess offset by putting a resistor from the unused input to ground, equal in value to the dc source resistance. Of course all offset problems are eliminated if the input is capacitively coupled. When using the SPWLM386D with higher gains (bypassing the 1.35k resistor between pin1 and 8) it is necessary to bypass the unused input, preventing degradation of gain and possible instabilities. This is done with a 0.1 F capacitor or a short to ground depending on the dc source resistance on the driven input. SPWLM386D Low Voltage Audio Power Amplifier |
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